Design of the Mosaic Element

Lutz, Chris and Rabin, Steve and Seitz, Charles L. and Speck, Don (1983) Design of the Mosaic Element. Technical Report. California Institute of Technology. [CaltechCSTR:1983.5093-tr-83]

Full text available as:

	Other (Adobe PDF (1MB))
	Postscript - Requires a viewer, such as GhostView

Abstract

The Mosaic element is a fast single chip computer designed to be used in groups for concurrent computation experiments. Each element contains a 16-bit processor, read-write storage, read-only store for a small initialization and bootstrap loading program and four output ports. The Mosaic processor, a highly structured design that achieves very good performance and density through innovations in its microcode, circuit techniques, and layout, is described in detai1.

EPrint Type:	Monograph (Technical Report)
Subjects:	All Records
ID Code:	411
Deposited By:	Caltech Library System
Deposited On:	07 August 2002
Record Number:	CaltechCSTR:1983.5093-tr-83
Official Persistent URL:	http://resolver.caltech.edu/CaltechCSTR:1983.5093-tr-83
Usage Policy:	You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.

Archive Staff Only: edit this record