Performance Analysis and Optimization of Asynchronous Circuits

Burns, Steven M. (1991) Performance Analysis and Optimization of Asynchronous Circuits. Technical Report. California Institute of Technology. [CaltechCSTR:1991.cs-tr-91-01]

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Abstract

Analytical techniques are developed to determine the performance of asynchronous digital circuits. These techniques can be used to guide the designer during the synthesis of such a circuit, leading to a high-performance, efficient implementation. Optimization techniques are also developed that further improve this implementation by determining the optimal sizes of the low-level devices (CMOS transistors) that compose the circuit.

EPrint Type:	Monograph (Technical Report)
Subjects:	All Records
ID Code:	81
Deposited By:	Caltech Library System
Deposited On:	25 April 2001
Record Number:	CaltechCSTR:1991.cs-tr-91-01
Official Persistent URL:	http://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-01
Usage Policy:	You are granted permission for individual, educational, research and non-commercial reproduction, distribution, display and performance of this work in any format.

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